[nextpage title=”Introduction”]
Since the launch of Pentium II, each top-shelf Intel CPU series has its value counterpart named Celeron. In this tutorial, you can check the characteristics of every mobile Celeron released to date.
By the way, if you want a list of the desktop Celeron models, check out our All Celeron Models tutorial.
Mobile models, however, are not idhentical to the desktop ones.
Early Mobile Celeron models (based on Pentium II and Pentium III architecture) were very similar to the desktop ones, but with lower voltage, thus consuming less power and dissipating less heat. The following models were based on Pentium M, Core Solo or Core Duo, always features like L2 memory cache, external bus speed and internal clock rate reduced in comparison to their desktop counterparts. The official name of these models is Celeron M. Note there were no desktop Celeron models base on this architecture.
The most recent models are based on Core 2 Duo and Core i3 architectures, some of them with two processing cores, some with only one. There are ultra low voltage models, focusing on low power consuption, and others with higher voltage and clock rates, aimed on laptops with higher performance (but still on the value segment). These models are named Mobile Celeron.
In the next pages you can have an idea of all mobile Celeron models launched to date and their characteristics.
[nextpage title=”Mobile Celeron (Pentium II and III)”]
First mobile Celeron models were based on Pentium II and Pentium III processors, operating, however, with a lower voltage, and thus with lower power consuption and heat dissipation.
The main characteristics of first Mobile Celeron models are:
- Based on Pentium II and Pentium III with Mendocino (0.25 µm), Coppermine (0.18 µm) or Tualatin (0.13 µm) cores
- Manufacturing technology: 0.25 µm (250 nm), 0.18 µm (180 nm) or 0.13 µm (130 nm)
- L1 Cache: 32 KB total, 16 KB for instructions and 16 KB for data
- L2 Cache: 128 KB on 0.25 µm and 0.18 µm models, 256 KB on 0.13 µm models
- External clock: 66 MHz, 100 MHz or 133 MHz
- Packaging/socket: PGA2, micro-PGA2, FC-PGA, socket 495, socket 479, socket 478, micro-FCPGA or micro-FCBGA
- Support to SSE instructions
In the table below we list all Mobile Celeron models based on Pentium II and Pentium III CPUs that were released.
|
sSpec |
Internal Clock |
External Clock |
L2 Cache |
Voltage (V) |
TDP (W) |
Technology |
|
SL6HA |
1.33 GHz |
133 MHz |
256 KB |
1.5 |
19 |
130 µm |
|
SL64K |
1.20 GHz |
133 MHz |
256 KB |
1.45 |
24.4 |
130 µm |
|
SL63Z |
1.20 GHz |
133 MHz |
256 KB |
1.5 |
24.4 |
130 µm |
|
SL64L |
1.13 GHz |
133 MHz |
256 KB |
1.5 |
23.8 |
130 µm |
|
SL642 |
1.13 GHz |
133 MHz |
256 KB |
1.5 |
24.4 |
130 µm |
|
SL64M |
1.06 GHz |
133 MHz |
256 KB |
1.5 |
23.2 |
130 µm |
|
SL643 |
1.06 GHz |
133 MHz |
256 KB |
1.45 |
23.2 |
130 µm |
|
SL6AB |
1.00 GHz |
133 MHz |
256 KB |
1.5 |
– |
130 µm |
|
SL6B3 |
1.00 GHz |
133 MHz |
256 KB |
1.4 |
– |
130 µm |
|
SL6B4 |
733 MHz |
133 MHz |
256 KB |
1.15 |
– |
130 µm |
|
SL5SR |
933 MHz |
133 MHz |
128 KB |
1.7 |
24.6 |
180 µm |
|
SL5SK |
933 MHz |
133 MHz |
128 KB |
1.7 |
20.6 |
180 µm |
|
SL5SU |
933 MHz |
133 MHz |
128 KB |
1.7 |
24.6 |
180 µm |
|
SL5T2 |
866 MHz |
133 MHz |
128 KB |
1.7 |
23.3 |
180 µm |
|
SL5Q3 |
866 MHz |
133 MHz |
128 KB |
1.7 |
23.3 |
180 µm |
|
SL5Q2 |
866 MHz |
133 MHz |
128 KB |
1.7 |
23.3 |
180 µm |
|
SL5T3 |
800 MHz |
133 MHz |
128 KB |
1.7 |
22 |
180 µm |
|
SL5SQ |
800 MHz |
133 MHz |
128 KB |
1.7 |
22 |
180 µm |
|
SL5ST |
800 MHz |
133 MHz |
128 KB |
1.7 |
22 |
180 µm |
|
SL5SP |
733 MHz |
133 MHz |
128 KB |
1.7 |
20.6 |
180 µm |
|
SL5SS |
733 MHz |
133 MHz |
128 KB |
1.7 |
20.6 |
180 µm |
|
SL5PX |
900 MHz |
100 MHz |
128 KB |
1.7 |
24 |
180 µm |
|
SL5PY |
900 MHz |
100 MHz |
128 KB |
1.7 |
24 |
180 µm |
|
SL57Y |
850 MHz |
100 MHz |
128 KB |
1.6 |
18.8 |
180 µm |
|
SL585 |
850 MHz |
100 MHz |
128 KB |
1.6 |
18.8 |
180 µm |
|
SL5CB |
800 MHz |
100 MHz |
128 KB |
1.6 |
17.6 |
180 µm |
|
SL584 |
800 MHz |
100 MHz |
128 KB |
1.6 |
17.6 |
180 µm |
|
SL57X |
800 MHz |
100 MHz |
128 KB |
1.6 |
17.6 |
180 µm |
|
SL58K |
750 MHz |
100 MHz |
128 KB |
1.6 |
15.8 |
180 µm |
|
SL56Q |
750 MHz |
100 MHz |
128 KB |
1.6 |
15.8 |
180 µm |
|
SL53U |
750 MHz |
100 MHz |
128 KB |
1.6 |
15.8 |
180 µm |
|
SL53C |
750 MHz |
100 MHz |
128 KB |
1.6 |
15.8 |
180 µm |
|
SL56P |
750 MHz |
100 MHz |
128 KB |
1.6 |
15.8 |
180 µm |
|
SL55Q |
750 MHz |
100 MHz |
128 KB |
1.6 |
15.8 |
180 µm |
|
SL4GU |
700 MHz |
100 MHz |
128 KB |
1.6 |
15 |
180 µm |
|
SL4GX |
700 MHz |
100 MHz |
128 KB |
1.6 |
15 |
180 µm |
|
SL4PY |
700 MHz |
100 MHz |
128 KB |
– |
23 |
180 µm |
|
SL63F |
650 MHz |
100 MHz |
256 KB |
1.1 |
7 |
130 µm |
|
SL4PX |
650 MHz |
100 MHz |
128 KB |
– |
14 |
180 µm |
|
SL4JG |
650 MHz |
100 MHz |
128 KB |
1.6 |
14 |
180 µm |
|
SL4AE |
650 MHz |
100 MHz |
128 KB |
1.6 |
14 |
180 µm |
|
SL4JW |
650 MHz |
100 MHz |
128 KB |
1.6 |
14 |
180 µm |
|
SL4AD |
650 MHz |
100 MHz |
128 KB |
1.6 |
14 |
180 µm |
|
SL4JV |
600 MHz |
100 MHz |
128 KB |
1.6 |
13 |
180 µm |
|
SL4PW |
600 MHz |
100 MHz |
128 KB |
1.6 |
13 |
180 µm |
|
SL4MU |
600 MHz |
100 MHz |
128 KB |
– |
13 |
180 µm |
|
SL5DS |
600 MHz |
100 MHz |
128 KB |
1.1 |
6.4 |
180 µm |
|
SL4AR |
600 MHz |
100 MHz |
128 KB |
1.6 |
13 |
180 µm |
|
SL4AP |
600 MHz |
100 MHz |
128 KB |
1.6 |
13 |
180 µm |
|
SL4JF |
600 MHz |
100 MHz |
128 KB |
1.6 |
13 |
180 µm |
|
SL582 |
600 MHz |
100 MHz |
128 KB |
1.35 |
8.7 |
180 µm |
|
SL3ZF |
550 MHz |
100 MHz |
128 KB |
1.6 |
18.4 |
180 µm |
|
SL3ZE |
550 MHz |
100 MHz |
128 KB |
1.6 |
18.4 |
180 µm |
|
SL4JE |
550 MHz |
100 MHz |
128 KB |
1.6 |
11.9 |
180 µm |
|
SL4MT |
550 MHz |
100 MHz |
128 KB |
1.6 |
11.9 |
180 µm |
|
SL4JD |
500 MHz |
100 MHz |
128 KB |
1.6 |
11.2 |
180 µm |
|
SL4ZR |
500 MHz |
100 MHz |
128 KB |
1.1 |
5 |
180 µm |
|
SL4PV |
500 MHz |
100 MHz |
128 KB |
1.6 |
11.2 |
180 µm |
|
SL4JU |
500 MHz |
100 MHz |
128 KB |
1.6 |
11.2 |
180 µm |
|
SL4JT |
500 MHz |
100 MHz |
128 KB |
1.6 |
11.2 |
180 µm |
|
SL46Y |
500 MHz |
100 MHz |
128 KB |
– |
11.2 |
180 µm |
|
SL43Z |
500 MHz |
100 MHz |
128 KB |
1.35 |
7.9 |
180 µm |
|
SL45A |
500 MHz |
100 MHz |
128 KB |
1.35 |
7.9 |
180 µm |
|
SL3PC |
500 MHz |
100 MHz |
128 KB |
1.6 |
16.8 |
180 µm |
|
SL43Q |
500 MHz |
100 MHz |
128 KB |
1.6 |
16.8 |
180 µm |
|
SL43R |
500 MHz |
100 MHz |
128 KB |
1.6 |
16.8 |
180 µm |
|
SL3PE |
500 MHz |
100 MHz |
128 KB |
1.6 |
16.8 |
180 µm |
|
SL43U |
450 MHz |
100 MHz |
128 KB |
1.6 |
15.5 |
180 µm |
|
SL43T |
450 MHz |
100 MHz |
128 KB |
1.6 |
15.5 |
180 µm |
|
SL4JS |
450 MHz |
100 MHz |
128 KB |
1.6 |
15.5 |
180 µm |
|
SL4PT |
450 MHz |
100 MHz |
128 KB |
1.6 |
15.5 |
180 µm |
|
SL3PD |
450 MHz |
100 MHz |
128 KB |
1.6 |
15.5 |
180 µm |
|
SL3PF |
450 MHz |
100 MHz |
128 KB |
1.6 |
15.5 |
180 µm |
|
SL4JC |
450 MHz |
100 MHz |
128 KB |
1.6 |
15.5 |
180 µm |
|
SL43W |
400 MHz |
100 MHz |
128 KB |
1.35 |
10.1 |
180 µm |
|
SL3UL |
400 MHz |
100 MHz |
128 KB |
1.35 |
10.1 |
180 µm |
|
SL4AB |
667 MHz |
66 MHz |
128 KB |
1.65 |
17.5 |
180 µm |
|
SL3KD |
466 MHz |
66 MHz |
128 KB |
1.9 |
20.7 |
250 µm |
|
SL3KC |
466 MHz |
66 MHz |
128 KB |
1.9 |
20.7 |
250 µm |
|
SL3KB |
433 MHz |
66 MHz |
128 KB |
1.9 |
19.4 |
250 µm |
|
SL3KA |
433 MHz |
66 MHz |
128 KB |
1.9 |
19.4 |
250 µm |
|
SL3GQ |
400 MHz |
66 MHz |
128 KB |
1.6 |
13.8 |
250 µm |
|
SL3GR |
400 MHz |
66 MHz |
128 KB |
1.6 |
13.8 |
250 µm |
|
SL3C7 |
366 MHz |
66 MHz |
128 KB |
1.6 |
13.1 |
250 µm |
|
SL3HQ |
366 MHz |
66 MHz |
128 KB |
1.6 |
13.1 |
250 µm |
|
SL3HP |
300 MHz |
66 MHz |
128 KB |
1.6 |
11.8 |
250 µm |
|
SL3HN |
300 MHz |
66 MHz |
128 KB |
1.6 |
11.1 |
250 µm |
|
SL3AH |
300 MHz |
66 MHz |
128 KB |
1.6 |
11.1 |
250 µm |
|
SL3C8 |
300 MHz |
66 MHz |
128 KB |
1.6 |
11.8 |
250 µm |
|
SL3HM |
266 MHz |
66 MHz |
128 KB |
1.6 |
9.8 |
250 µm |
|
SL3DQ |
266 MHz |
66 MHz |
128 KB |
1.5 |
9.8 |
250 µm |
TDP stands for Thermal Design Power and indicates the CPU thermal dissipation, i.e., the CPU cooler must be capable of dissipating at least this amount of heat.
[nextpage title=”Mobile Celeron (Pentium 4)”]
Mobile Celeron models based on Pentium 4 have an external bus of 400 MHz (100 MHz transferring four data units by clock cycle, i.e., Quad Data Rate, a.k.a. QDR), 256 KB L2 cache and were manufactured with 0.13 µm (130 nm) technology. For a more detailed explanation on those CPUs microarchitecture, read out Inside Pentium 4 Architecture tutorial.
Their main characteristics are:
- Based on Pentium 4 with Northwood core
- Manufacturing technology: 0.13 µm
- L1 Cache: 12k micro instructions (µops)
- L2 Cache: 256 KB
- External Clock: 400 MHz (100 MHz QDR)
- Socket: 478
- Maximum temperature: 100o C
- Support for SSE2 instructions
In the table below we list all Mobile Celeron models based on Pentium 4 processors that were released.
|
sSpec |
Internal Clock |
Voltage (V) |
TDP (W) |
| SL75J | 2.4 GHz | 1.3 | 35 |
| SL73Y | 2.2 GHz | 1.3 | 35 |
| SL6ZW | 2.2 GHz | 1.3 | 35 |
| SL6VJ | 2.0 GHz | 1.3 | 32 |
| SL6QH | 2.0 GHz | 1.3 | 32 |
| SL6VH | 1.8 GHz | 1.3 | 30 |
| SL6J4 | 1.8 GHz | 1.3 | 30 |
| SL6VG | 1.7 GHz | 1.3 | 30 |
| SL6J3 | 1.7 GHz | 1.3 | 30 |
| SL6J2 | 1.6 GHz | 1.3 | 30 |
| SL6M5 | 1.5 GHz | 1.3 | 30 |
| SL6FN | 1.5 GHz | 1.3 | 30 |
| SL6M4 | 1.4 GHz | 1.3 | 30 |
| SL6FM | 1.4 GHz | 1.3 |
30 |
TDP stands for Thermal Design Power and indicates the CPU thermal dissipation, i.e., the CPU cooler must be capable of dissipating at least this amount of heat.
[nextpage title=”Celeron M 300 Series”]
Celeron M 300 series models are based on Pentium M, but with only half L2 cache in comparison with this other CPU. Some models are based on Banias core, manufactured under 0.13 µm (130 nm) technology and with 512 KB L2 cache, while others are based on Dothan core, manufactured under 90 nm technology and with 1 MB or 512 KB L2 cache. All models work with a 400 MHz external bus (100 MHz transferring four data units per clock cycle, i.e., Quad Data Rate or QDR). To learn more about the architecture used by these CPUs, read our Inside Pentium M Architecture tutorial.
Main characteristics of Celeron M 300 series are:
- Based on Pentium M with Banias (0.13 µm) or Dothan (90 nm) cores
- Manufacturing technology: 0.13 µm (130 nm) or 90 nm
- L1 Cache: 32 KB for instructions and 32 KB for data
- L2 Cache: 512 KB or 1 MB
- External Clock: 400 MHz (100 MHz QDR)
- Packaging: micro-FCPGA or micro-FCBGA
- Maximum temperature: 100o C
- Support for SSE2 instructions
In the table below we list all Celeron M 300 series models that were released.
| sSpec | Model | Internal Clock | L2 Cache | Tech. | Voltage (V) | TDP (W) | Packaging |
| SL8MH | 390 | 1.7 GHz | 1 MB | 90 nm | 1.004 – 1.292 | 27 | micro-FCBGA |
| SL8MP | 390 | 1.7 GHz | 1 MB | 90 nm | 1.25 – 1.4 | 27 | micro-FCPGA |
| SL8MV | 390 | 1.7 GHz | 1 MB | 90 nm | 1.004 – 1.292 | 27 | micro-FCBGA |
| SL8LV | 383 | 1.0 GHz | 1 MB | 90 nm | 0.876 – 0.956 | 5.5 | micro-FCBGA |
| SL8MN | 380 | 1.6 GHz | 1 MB | 90 nm | 0.988 – 1.292 | 21 | micro-FCPGA |
| SL8MG | 380 | 1.6 GHz | 1 MB | 90 nm | 1.004 – 1.292 | 21 | micro-FCBGA |
| SL89S | 373J | 1.0 GHz | 512 KB | 90 nm | 0.94 | 5.5 | micro-FCBGA |
| SL8A4 | 373J | 1.0 GHz | 512 KB | 90 nm | 0.94 | 5.5 | micro-FCBGA |
| SL8LW | 373 | 1.0 GHz | 512 KB | 90 nm | – | 5.5 | micro-FCBGA |
| SL8LQ | 373 | 1.0 GHz | 512 KB | 90 nm | 0.876 – 0.956 | 5.5 | micro-FCBGA |
| SL8MF | 370 | 1.5 GHz | 1 MB | 90 nm | 1.004 – 1.292 | 21 | micro-FCBGA |
| SL8MM | 370 | 1.5 GHz | 1 MB | 90 nm | 0.988 – 1.292 | 21 | micro-FCPGA |
| SL8MT | 370 | 1.5 GHz | 1 MB | 90 nm | 0.988 – 1.292 | 21 | micro-FCBGA |
| SL86J | 370 | 1.5 GHz | 1 MB | 90 nm | 1.26 | 21 | micro-FCPGA |
| SL86P | 370 | 1.5 GHz | 1 MB | 90 nm | 1.26 | 21 | micro-FCBGA |
| SL86Q | 360 | 1.4 GHz | 1 MB | 90 nm | 1.26 | 21 | micro-FCBGA |
| SL8ML | 360 | 1.4 GHz | 1 MB | 90 nm | 1.004 – 1.292 | 21 | micro-FCPGA |
| SL86K | 360 | 1.4 GHz | 1 MB | 90 nm | 1.26 | 21 | micro-FCPGA |
| SL7LS | 360 | 1.4 GHz | 1 MB | 90 nm | 1.26 | 21 | micro-FCPGA |
| SL7LR | 360 | 1.4 GHz | 1 MB | 90 nm | 1.26 | 21 | micro-FCBGA |
| SL7QX | 353 | 900 MHz | 512 KB | 90 nm | – | 5 | micro-FCBGA |
| SL7F7 | 353 | 900 MHz | 512 KB | 90 nm | 0.956 – 1.052 | 5 | micro-FCBGA |
| SL8MK | 350 | 1.3 GHz | 1 MB | 90 nm | 1.3 | 21 | micro-FCPGA |
| SL7R9 | 350 | 1.3 GHz | 1 MB | 90 nm | 1.26 | 21 | micro-FCBGA |
| SL7RA | 350 | 1.3 GHz | 1 MB | 90 nm | 1.26 | 21 | micro-FCBGA |
| SL86L | 350 | 1.3 GHz | 1 MB | 90 nm | 1.26 | 21 | micro-FCPGA |
| SL8MD | 350 | 1.3 GHz | 1 MB | 90 nm | 1.004 – 1.292 | 21 | micro-FCBGA |
| SL7ME | 340 | 1.5 GHz | 512 KB | 0.13 µm | 0.956 – 1.052 | 24.5 | micro-FCPGA |
| SL6N7 | 320 | 1.3 GHz | 512 KB | 0.13 µm | 1.324 | 24.5 | micro-FCPGA |
| SL8FM | 320 | 1.3 GHz | 512 KB | 0.13 µm | – | 24.5 | micro-FCBGA |
| SL6NM | 320 | 1.3 GHz | 512 KB | 0.13 µm | 1.324 | 24.5 | micro-FCBGA |
| SL79T | 310 | 1.2 GHz | 512 KB | 0.13 µm | 1.324 | 24.5 | micro-FCBGA |
| SL79S | 310 | 1.2 GHz | 512 KB | 0.13 µm | 1.356 | 24.5 | micro-FCPGA |
TDP stands for Thermal Design Power and indicates the CPU thermal dissipation, i.e., the CPU cooler must be capable of dissipating at least this amount of heat.
[nextpage title=”Celeron M 400 Series”]
Celeron M 400 series processors are based on Core Solo (Yonah core), but with half L2 cache (compared to Core Solo) and no Enhanced Speedstep technology. It is a CPU based on Pentium M microarchitecture manufactured under 65 nm technology, with 1 MB L2 cache and 533 MHz external bus (133 MHz transferring four data units per clock cycle, i.e., Quad Data Rate or QDR).
Celeron M 400 series main characteristics are:
- Based on Core Solo with Yonah core
- Manufacturing technology: 65 nm
- L1 Cache: 32 KB for instructions and 32 KB for data
- L2 Cache: 1 MB
- External clock: 533 MHz (133 MHz QDR)
- Packaging: micro-FCPGA or micro-FCBGA
- Maximum temperature: 100o C
- Support for SSE3 instructions
In the table below we list all Celeron M 400 series models that were released.
|
sSpec |
Model |
Internal Clock |
Voltage (V) |
TDP (W) |
Packaging |
| SL9KX | 450 | 2.0 GHz | 1.0 – 1.3 | 27 | micro-FCPGA |
| SL9L8 | 443 | 1.2 GHz | 0.95 – 0.975 | 5.5 | micro-FCBGA |
| SL9KW | 440 | 1.86 GHz | 1.0 – 1.3 | 27 | micro-FCPGA |
| SL9KV | 430 | 1.73 GHz | 1.0 – 1.3 | 27 | micro-FCPGA |
| SL92F | 430 | 1.73 GHz | 1.0 – 1.3 | 27 | micro-FCPGA |
| SL8XW | 423 | 1.06 GHz | 0.85 – 1.1 | 5.5 | micro-FCBGA |
| SL8VZ | 420 | 1.6 GHz | 1.0 – 1.3 | 27 | micro-FCPGA |
| SL8W2 | 410 | 1.46 GHz | 1.0 – 1.3 | 27 | micro-FCPGA |
T
DP stands for Thermal Design Power and indicates the CPU thermal dissipation, i.e., the CPU cooler must be capable of dissipating at least this amount of heat.
[nextpage title=”Mobile Celeron 500 Series”]
Mobile Celeron 500 series units are based on Core 2 Duo (Core architecture), but with only one processing core (Meron core), being manufactured under 65 nm technology, having 1 MB L2 cache and external clock rate of 533 MHz or 667 MHz (133 MHz or 166 MHz transferring four data units per clock cycle, respectively). If you want to learn more about the architecture used by these processors, check out our Inside Intel Core Microarchitecture tutorial.
Mobile Celeron 500 series main characteristics are:
- Base on Core 2 Duo
- Merom core
- Only one processing core
- Manufacturing technology: 65 nm
- L1 Cache: 32 KB for instructions and 32 KB for data
- L2 Cache: 1 MB
- External clock: 533 MHz (133 MHz QDR) or 667 MHz (166 MHz QDR)
- Packaging: micro-FCPGA
- Maximum temperature: 100o C
- Support for SSE3 instructions
In the table below we list all Mobile Celeron 500 series models that were released.
| sSpec | Model | Internal Clock | External Clock | Voltage (V) | TDP (W) |
| SLB6L | 585 | 2.16 GHz | 667 MHz | 1.075 – 1.175 | 31 |
| SLB6M | 575 | 2.0 GHz | 667 MHz | 1.075 – 1.175 | 31 |
| SLA2D | 560 | 2.13 GHz | 533 MHz | 1.1 – 1.25 | 31 |
| SLA2E | 550 | 2.0 GHz | 533 MHz | 1.1 – 1.25 | 27 |
| SLA2F | 540 | 1.86 GHz | 533 MHz | 1.1 – 1.25 | 27 – 31 |
| SL9VA | 530 | 1.73 GHz | 533 MHz | 1.125 – 1.255 | 26 |
| SLA2G | 530 | 1.73 GHz | 533 MHz | 1.1 – 1.25 | 27 |
| SLAHP | 523 | 930 MHz | 533 MHz | 0.85 – 1.1 | 5.5 |
| SL9WT | 520 | 1.6 GHz | 533 MHz | 0.95 – 1.3 | 30 |
| SL9WN | 520 | 1.6 GHz | 533 MHz | 1.1 – 1.25 | 26 |
TDP stands for Thermal Design Power and indicates the CPU thermal dissipation, i.e., the CPU cooler must be capable of dissipating at least this amount of heat.
[nextpage title=”Mobile Celeron 700 Series”]
Mobile Celeron 700 series models are based on 45-nm Core 2 Duo (Core architecture), but with only one processing core. They are aimed to netbooks and low-power laptops, and have 1 MB L2 cache and external clock rate of 800 MHz (200 MHz transferring four data units per clock cycle). If you want to learn more about the architecture used by these processors, check out our Penryn Core New Features tutorial.
Mobile Celeron 700 series main characteristics are:
- Base on Core 2 Duo
- Penryn core
- Only one processing core
- Manufacturing technology: 45 nm
- L1 Cache: 32 KB for instructions and 32 KB for data
- L2 Cache: 1 MB
- External clock: 800 MHz (200 MHz QDR)
- Packaging: micro-FCBGA
- Maximum temperature: 100o C
- Support for SSE4.1 instructions
In the table below we list the only Mobile Celeron 700 series model launched so far.
|
sSpec |
Model |
Internal Clock |
Voltage (V) |
TDP (W) |
| SLGEV | 743 | 1.3 GHz | – | 10 |
| SLGAM | 723 | 1.2 GHz | 1.05 – 1.15 | 10 |
| SLGAS | 723 | 1.2 GHz | 1.05 – 1.15 | 10 |
| SLGAN | 722 | 1.2 GHz | 0.775 – 1.1 | 5.5 |
| SLGAT | 722 | 1.2 GHz | 0.775 – 1.1 | 5.5 |
TDP stands for Thermal Design Power and indicates the CPU thermal dissipation, i.e., the CPU cooler must be capable of dissipating at least this amount of heat.
[nextpage title=”Mobile Celeron 900 Series”]
Mobile Celeron 900 series processors are based on 45-nm Core 2 Duo (Core architecture), but with only one processing core. They have 1 MB L2 cache and external clock rate of 800 MHz (200 MHz transferring four data units per clock cycle). If you want to learn more about those processors architecture, check out our Penryn Core New Features tutorial.
Mobile Celeron series 900 main characteristics are:
- Base on Core 2 Duo
- Penryn core
- Only one processing core
- Manufacturing technology: 45 nm
- L1 Cache: 32 KB for instructions and 32 KB for data
- L2 Cache:
1 MB - External clock: 800 MHz (200 MHz QDR)
- Packaging: micro-FCPGA
- Maximum temperature: 105o C
- Support for SSE4.1 instructions
In the table below we list the only Mobile Celeron 900 series model launched so far.
|
sSpec |
Model |
Internal Clock |
Voltage (V) |
TDP (W) |
| SLGLQ | 900 | 2.2 GHz | 1.0 – 1.25 | 35 |
TDP stands for Thermal Design Power and indicates the CPU thermal dissipation, i.e., the CPU cooler must be capable of dissipating at least this amount of heat.
[nextpage title=”Mobile Celeron T1000 Series”]
Mobile Celeron T1000 series units are based on 65-nm Core 2 Duo, with two processing cores. If you want to learn more about the architecture used by these processors, check out our Inside Intel Core Microarchitecture tutorial.
Mobile Celeron T1000 series main characteristics are:
- Base on Core 2 Duo
- Meron core
- Two processing cores
- Manufacturing technology: 65 nm
- L1 Cache: 32 KB for instructions and 32 KB for data
- L2 Cache: 512 KB or 1 MB
- External clock: 533 MHz (133 MHz QDR) ou 667 MHz (166 MHz QDR)
- Packaging: micro-FCPGA
- Maximum temperature: 100o C
- Support for SSE3 instructions
In the table below we list all Mobile Celeron series T1000 models released to date.
| sSpec | Model | Internal Clock | External clock | L2 Cache | Voltage (V) | TDP (W) |
| SLB6H | T1700 | 1.83 GHz | 667 MHz | 1 MB | 1.075 – 1.175 | 35 |
| SLB6J | T1600 | 1.66 GHz | 667 MHz | 1 MB | 1.075 – 1.175 | 35 |
| SLAQK | T1500 | 1.86 GHz | 533 MHz | 512 KB | 1.075 – 1.175 | 35 |
| SLAQL | T1400 | 1.73 GHz | 533 MHz | 512 KB | 1.075 – 1.175 | 35 |
TDP stands for Thermal Design Power and indicates the CPU thermal dissipation, i.e., the CPU cooler must be capable of dissipating at least this amount of heat.
[nextpage title=”Mobile Celeron T3000 Series”]
Mobile Celeron T3000 series models are based on 45-nm Core 2 Duo (Core architecture) with two processing cores. They have 1 MB L2 cache and external clock rate of 800 MHz (200 MHz transferring four data units per clock cycle). If you want to learn more about the architecture used by these processors check out our Penryn Core New Features tutorial.
Mobile Celeron T3000 series main characteristics are:
- Base on Core 2 Duo
- Penryn core
- Two processing cores
- Manufacturing technology: 45 nm
- L1 Cache: 32 KB for instructions and 32 KB for data
- L2 Cache: 1 MB
- External clock: 800 MHz (200 MHz QDR)
- Packaging: micro-FCPGA or micro-FCBGA
- Maximum temperature: 105o C
- Support for SSE4.1 instructions
In the table below we list all Mobile Celeron T3000 series models released to date.
| sSpec | Model | Internal Clock | Voltage (V) | TDP (W) | Packaging |
| SLG92 | T3300 | 2.0 GHz | – | 35 | micro-FCPGA |
| SLGJW | T3300 | 2.0 GHz | – | 35 | micro-FCPGA |
| SLGEY | T3100 | 1.9 GHz | 1.0 – 1.25 | 35 | micro-FCPGA |
| SLGVS | T3100 | 1.9 GHz | 1.0 – 1.25 | 35 | micro-FCBGA |
| SLGMY | T3000 | 1.8 GHz | 1.0 – 1.25 | 35 | micro-FCBGA |
TDP stands for Thermal Design Power and indicates the CPU thermal dissipation, i.e., the CPU cooler must be capable of dissipating at least this amount of heat.
[nextpage title=”Mobile Celeron SU2000 Series”]
Mobile Celeron SU2000 series are low-TDP processors based on 45-nm Core 2 Duo with two processing cores. They have 1 MB L2 cache and external clock rate of 800 MHz (200 MHz transferring four data units per clock cycle). If you want to learn more about the architecture used by these processors, check out our Penryn Core New Features tutorial.
Mobile Celeron SU2000 series main characteristics are:
- Based on Core 2 Duo
- Penryn core
- Two processing cores
- Manufacturing technology: 45 nm
- L1 Cache: 32 KB for instructions and 32 KB for data
- L2 Cache: 1 MB
- External clock: 800 MHz (200 MHz QDR)
- Packaging: micro-FCBGA
- Maximum temperature: 100o C
- Support for SSE4.1 instructions
In the table below we list all Mobile Celeron SU2000 series models released to date.
| sSpec | Model | Internal Clock | Voltage (V) | TDP (W) |
| SLGYW | SU2300 | 1.2 GHz | 1.05 – 1.15 | 10 |
| SLGSB | SU2300 | 1.2 GHz | 1.05 – 1.15 | 10 |
TDP stands for Thermal Design Power and indicates the CPU thermal dissipation, i.e., the CPU cooler must be capable of dissipating at least this amount of heat.
[nextpage title=”Mobile Celeron U3000 Series”]
The Mobile Celeron U3000 series is based on the 32 nm Core i3, with two processing cores, but without support to Turbo Boost and Hyper-Threading thechnologies. It has a 2 MB L3 cache and DMI bus at 2 GB/s, besides integrated memory and video controllers. For more information about this architecture, read our Inside Intel Nehalem Microarchitecture tutorial.
The main characteristics of the Mobile Celeron U3000 series are:
- Based on Core i3
- Arrandale core
- Two processing cores
- Manufacturing technology: 32 nm
- L1 Cache: 32 KB for instructions and 32 KB for data
- L2 Cache: 256 KB per core
- L3 Cache: 2 MB
- DMI bus (2 GB/s)
- Integrated PCI Express 2.0 controller (one x16 lane)
- Integrated memory controller supporting up to 8 GB in dual-channel architecture
- Support for DDR3 memories up to 800 MHz
- Integrated Graphics Adapter, running at 500 MHz
- Socket: BGA1288
- Maximum temperature: 105 °C
- SSE4.1 and SSE4.2 instruction sets
In the table below we list the Mobile Celeron U3000 series model released to date. TDP stands for Thermal Design Power and indicates the CPU thermal dissipation, i.e., the CPU cooler must be capable of dissipating at least this amount of heat.
|
sSpec |
Model |
Internal Clock |
Voltage (V) |
TDP (W) |
| SLBUE | U3400 | 1.06 GHz | – | 18 |
[nextpage title=”Mobile Celeron P4000 Series”]
The Mobile Celeron P4000 series is based on the 32 nm Core i3, with two processing cores, but without support to Turbo Boost and Hyper-Threading thechnologies. It has a 2 MB L3 cache and DMI bus at 2 GB/s, besides integrated memory and video controllers. For more information about this architecture, read our Inside Intel Nehalem Microarchitecture tutorial.
The main characteristics of the Mobile Celeron P4000 series are:
- Based on Core i3
- Arrandale core
- Two processing cores
- Manufacturing technology: 32 nm
- L1 Cache: 32 KB for instructions and 32 KB for data
- L2 Cache: 256 KB per core
- L3 Cache: 2 MB
- DMI bus (2 GB/s)
- Integrated PCI Express 2.0 controller (one x16 or two x8 lanes)
- Integrated memory controller supporting up to 8 GB in dual-channel architecture
- Support for DDR3 memories up to 1066 MHz
- Integrated Graphics Adapter, running at 667 MHz
- Socket: BPA988 or BGA1288
- Maximum temperature: 90 °C
- SSE4.1 and SSE4.2 instruction sets
In the table below we list the Mobile Celeron P4000 series models released to date. TDP stands for Thermal Design Power and indicates the CPU thermal dissipation, i.e., the CPU cooler must be capable of dissipating at least this amount of heat.
| sSpec | Model | Internal Clock | Voltage (V) | TDP (W) | Package |
| SLBQB | P4505 | 1.86 GHz | – | 35 | 1288 |
| SLBNL | P4500 | 1.86 GHz | – | 35 | 988 |
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