Inside AMD K10 Architecture

K10 Server CPUs Roadmap

You can see K10-based server CPUs roadmap on Figures 9 and 10.

Figure 9: K10 server CPUs roadmap.

Figure 10: K10 server CPUs roadmap.

As expected the first CPU to be launched using the new K10 architecture will be a quad-core Opteron processor based on “Barcelona” core. In Figure 11, you can see the Opteron "Barcelona" models AMD plans to launch and below it a table containing all models released so far.

Figure 11: Clock rates and TDP that will be available for the quad-core Opteron “Barcelona.”  

Here is a quick summary of the cores that will be launched for the server market based on K10 architecture:

• Barcelona: quad- or dual-core Opteron on the 2000 and 8000 series, 512 KB L2 memory cache per core, 2 MB L3 memory cache, registered DDR2 memory, socket 1207 (socket F), HyperTransport 1.x, 65 nm manufacturing process.
• Budapest: dual-core Opteron on the 1000 series, 512 KB L2 memory cache per core, 2 MB L3 memory cache, conventional DDR2 memory, socket 1207 (socket F), HyperTransport 1.x or 3.0, 65 nm manufacturing process.
• Shanghai: quad- or dual-core Opteron on the 2000 and 8000 series, 512 KB L2 memory cache per core, 6 MB L3 memory cache, registered DDR2 memory, socket 1207 (socket F), HyperTransport 1.x, 45 nm manufacturing process.
• Montreal: octal- or quad-core Opteron on the 2000 and 8000 series, 1 MB L2 memory cache per core, 6 MB or 12 MB L3 memory cache, registered DDR3 memory, socket G3, HyperTransport 1.x, 45 nm manufacturing process.
• Suzuka: quad- or dual-core Opteron on the 1000 series, 512 KB L2 memory cache per core, 6 MB L3 memory cache, conventional DDR3 memory, socket AM3, HyperTransport 3.0, 45 nm manufacturing process.

Now let’s see the planned
desktop models.