Inside the Intel Haswell Microarchitecture

New Dispatch Ports and Execution Units

From the Nehalem microarchitecture on, Intel CPUs have six dispatch ports to connect the CPU’s Reservation Station (where microinstructions awaiting to be processed are stored) to the CPU’s execution units. The Haswell microarchitecture adds two new dispatch ports, increasing the number of microinstructions the Reservation Station can send to the execution units by 33%.

The Haswell microarchitecture has a total of 17 execution units, while the Sandy Bridge and Ivy Bridge microarchitectures have 15 and the Nehalem microarchitecture has 12.

An important enhancement added to the Haswell microarchitecture is the addition of 256-bit datapaths between the Reservation Station and the execution units. The Sandy Bridge and Ivy Bridge microarchitectures use 128-bit datapaths and, therefore, when 256-bit AVX instructions have to be executed, two execution engines must be combined. This doesn’t happen with the Haswell microarchitecture.

Figure 2: New dispatch ports and execution units of the Haswell microarchitecture