Phenom II X4 970 and Phenom II X6 1075T CPU Review
The Tested CPUs
Contents
In the tables below you can see a comparison between the CPUs we included in our review. AMD CPUs do not support SSE4 instructions (they have a proprietary instruction set called SSE4a, which is not the same thing as SSE4).
| CPU | Cores | HT | Internal Clock | Turbo Clock | QPI or FSB | Base Clock | Core | Technology | TDP | Socket | Price |
| Core i7-980X | 6 | Yes | 3.33 GHz | 3.60 GHz | 6.4 GB/s | 133 MHz | Gulftown | 32 nm | 130 W | 1366 | USD 1,000 |
| Core i7-965 | 4 | Yes | 3.20 GHz | 3.46 GHz | 6.4 GB/s | 133 MHz | Bloomfield | 45 nm | 130 W | 1366 | NA |
| Core i7-870 | 4 | Yes | 2.93 GHz | 3.60 GHz | 2 GB/s | 133 MHz | Lynnfield | 45 nm | 95 W | 1156 | USD 290 |
| Core i5-750 | 4 | No | 2.66 GHz | 3.20 GHz | 2 GB/s | 133 MHz | Lynnfield | 45 nm | 95 W | 1156 | USD 195 |
| Phenom II X6 1090T | 6 | No | 3.2 GHz | 3.6 GHz | 8 GB/s | 200 MHz | Thuban | 45 nm | 125 W | AM3 | USD 266 |
| Phenom II X6 1075T | 6 | No | 3.0 GHz | 3.5 GHz | 8 GB/s | 200 MHz | Thuban | 45 nm | 125 W | AM3 | USD 240 |
| Phenom II X4 970 | 4 | No | 3.5 GHz | – | 8 GB/s | 200 MHz | Deneb | 45 nm | 125 W | AM3 | USD 181 |
| Phenom II X4 965 | 4 | No | 3.4 GHz | – | 8 GB/s | 200 MHz | Deneb | 45 nm | 140 W * | AM3 | USD 160 |
TDP stands for Thermal Design Power which advises the user of the maximum amount of heat the CPU can dissipate. The CPU cooler must be capable of dissipating at least this amount of heat.
* Newer models are coming with a TDP of 125 W. The tested model was from the older version, with a TDP of 140 W.
The prices listed were researched at Newegg.com on the day we published this review.
| CPU | L1 Cache | L2 Cache | L3 Cache | Memory Support | Memory Channels |
| Core i7-980X | 32 KB + 32 KB per core | 256 KB per core | 12 MB total | DDR3 up to 1066 MHz | Three |
| Core i7-965 | 32 KB + 32 KB per core | 256 KB per core | 8 MB total | DDR3 up to 1066 MHz | Three |
| Core i7-870 | 32 KB + 32 KB per core | 256 KB per core | 8 MB total | DDR3 up to 1333 MHz | Two |
| Core i5-750 | 32 KB + 32 KB per core | 256 KB per core | 8 MB total | DDR3 up to 1333 MHz | Two |
| Phenom II X6 1090T | 64 KB + 64 KB per core | 512 KB per core | 6 MB total | DDR3 up to 1333 MHz | Two |
| Phenom II X6 1075T | 64 KB + 64 KB per core | 512 KB per core | 6 MB total | DDR3 up to 1333 MHz | Two |
| Phenom II X4 970 | 64 KB + 64 KB per core | 512 KB per core | 6 MB total | DDR3 up to 1333 MHz | Two |
| Phenom II X4 965 | 64 KB + 64 KB per core | 512 KB per core | 6 MB total | DDR3 up to 1333 MHz | Two |
AMD CPUs talk to the external world (i.e., the chipset) through a bus called HyperTransport. For a detailed explanation how this bus works, please read our The HyperTransport Bus Used by AMD Processors tutorial.
Socket LGA1366 CPUs talk to the external world (i.e., the chipset) through a bus called QuickPath Interconnect (QPI), which has the same goal as the HyperTransport bus. For a detailed explanation on how QPI bus works, read our Everything You Need to Know About The QuickPath Interconnect (QPI) tutorial. Socket LGA1156 CPUs, however, use the DMI (Digital Media Interface) bus to talk to the chipset, which is the interface previously used to make the connection between the north bridge and the south bridge chips on Intel chipsets. At a first look this solution may seem worse than using the QPI bus, because the DMI interface provides a maximum transfer rate of 2 GB/s while QPI provides a maximum transfer rate of 4.8 GB/s or 6.4 GB/s, depending on the CPU. However, on socket LGA1156 the CPU has an integrated PCI Express 2.0 controller, so these CPUs talk directly to the main video card without using their external bus and without using the chipset.
Our tests have a known flaw. Socket LGA1366 Core i7 processors support triple-channel memory configuration and with them we used three 1 GB DDR3-1066 modules, so these CPUs had 3 GB available. With all other CPUs we used two 1 GB DDR3-1333 modules, so these CPUs had 2 GB available. Unfortunately due to the different memory configuration supported by each CPU, we had to decide which methodology to use, and we chose to use one that would provide the “best” memory configuration for the tested system.